Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Low-power dual-rail multiple-valued current-mode logic circuit using multiple input-signal levels

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Dual-rail multiple-valued current-mode VLSI with biasing current sources

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Fully source-coupled logic based multiple-valued VLSI

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Self-checking multiple-valued circuit based on dual-rail current-mode differential logic

科研費報告書収録論文(課題番号:09558027・基盤研究(B)(2)・H9～H12/研究代表者:羽生, 貴弘/1トランジスタセル多値連想メモリの試作とその応用

A Real-Time Hand Gesture Interface Implemented on a Multi-Core Processor

This paper describes a real-time hand gesture recognition system and its application to VCR remote control. Cascaded classifiers are used to detect a number of different hand poses. In order to detect a hand in real time, the detection algorithm is optimized for multi-core processors by distributing the operations to multiple cores and minimizing the data transmission between them. We have implemented a detection system on a processor with eight cores. Further we have integrated the system into a prototype video recorder simulator to evaluate a gesture interface for consumer electronics. The operating speed increases by a factor of up to 13.5 compared to a standard PC with single-core processor. 1